Welcome, Guest. Please login or register.

Login with username, password and session length

 
Advanced search

164918 Posts in 11090 Topics- by 12965 Members - Latest Member: jimSteertWarwydxbar

September 04, 2010, 06:03:32 PM

www.lovebeats.orgArticlesTips & TricksTopic: Reduced Instruction Set Computing
Pages: [1]   Go Down
Print
Author Topic: Reduced Instruction Set Computing  (Read 150 times)
0 Members and 1 Guest are viewing this topic.
shah khan
Guest
« on: July 27, 2008, 07:07:33 PM »

Reduced Instruction Set Computing


Reduced Instruction Set Computing or RISC, in computer science, a type of microprocessor design that focuses on rapid and efficient processing of a relatively small set of instructions. RISC design is based on the premise that most of the instructions a computer decodes and executes are simple. As a result, RISC architecture limits the number of instructions that are built into the microprocessor but optimizes each so it can be carried out very rapidly—usually within a single clock cycle. RISC chips thus execute simple instructions faster than microprocessors designed to handle a much wider array of instructions. Families of RISC chips that are gaining popularity include Sun Microsystems' SPARC, Motorola's PowerPC, Digital Equipment Corporation's Alpha, Mips' R4000 and R4400, and Acorn's ARM.
Logged
The X-Factor....
www.karthi.we.bs
Global Moderator
King
*****
Offline Offline

Gender: Male
Posts: 14329



WWW
« Reply #1 on: July 27, 2008, 07:13:40 PM »

Yeah..
Reduction in Instruction set made computing easier...
Logged


shah khan
Guest
« Reply #2 on: July 27, 2008, 07:25:32 PM »

thanks a lot dear Karthik.
Logged
Pages: [1]   Go Up
Print
www.lovebeats.orgArticlesTips & TricksTopic: Reduced Instruction Set Computing
Jump to: